1. Field of the Invention
The invention relates to a tester for testing a semiconductor chip such as a bare chip or a package such as a narrow-pitched ball grid array to be mounted on a printed wiring board by face-down bonding. The invention relates further to a method of testing a semiconductor chip such as a bare chip or a package such as a narrow-pitched ball grid array to be mounted on a printed wiring board by face-down bonding.
2. Description of the Related Art
In these days, a semiconductor chip or a semiconductor package is generally mounted on a printed wiring board (PWB) by a face-down boding process which is one of wireless bonding processes.
In accordance with a face-down bonding process, since a connection terminal of a printed wiring board is positioned just below or in the vicinity of a semiconductor chip, it would be possible to mount semiconductor chips on a printed wiring board at a high density.
In addition, since a plurality of external terminals such as semiconductor chips can be bonded at a time, it would be possible to mount a plurality of semiconductor chips in a short period of time. Furthermore, since a semiconductor chip and a printed wiring board are positioned at a short distance to each other in a face-down bonding process, a face-down bonding process is suitable to a high-speed device.
As mentioned above, a face-down bonding process presents various advantages.
In general, a semiconductor chip or a semiconductor package to be mounted on a printed wiring board by a face-down bonding process is formed at a surface thereof with a plurality of externally projecting terminals at a high density. For instance, a bare chip or a ball grid array (BGA) including balls arranged at a narrow pitch is designed to include thousands of external terminals at a pitch of about 0.2 mm. It would be quite difficult to surely contact all of the external terminals to tester pins.
Hence, a test was conventionally made in order to merely guarantee a quality of a semiconductor chip, however, it was quite difficult or almost impossible to directly test a semiconductor chip as to whether a semiconductor chip could operate in a desired manner.
As a result, a semiconductor chip was tested as to whether it could operate in a desired manner, after the semiconductor chip was mounted on a printed wiring board. This test is called a card test.
FIG. 1 illustrates one of card tests, in which a bare chip mounted on a printed wiring board is tested by means of pins (hereinafter, a test as explained hereinbelow is called a pin type test).
In the pin type test, a bare chip 2 is mounted on a printed wiring board 10.
Then, electrode pins 104 are caused to stand on electrode pads 103 formed on opposite surfaces of the printed wiring board 10. Specifically, guide blocks to which the electrode pins 104 are fixed are compressed onto the printed wiring board 10 from opposite sides of the printed wiring board 10 to thereby ensure contact between the electrode pads 103 and the electrode pins 104.
Then, a test signal is input into the bare chip 2 from the electrode pins 104 through the printed wiring board 10, and subsequently, the test signal is picked out of the bare chip 2 to thereby test performances of the bare chip 2.
However, it would be quite difficult to take a semiconductor chip out of a printed wiring board after the semiconductor chip has been once mounted on the printed wiring board by a face-down bonding process. Hence, if a semiconductor chip is found defective in the pin type test, not only the semiconductor chip but also the printed wiring board on which the semiconductor chip is mounted have to be scrapped together. This results in a problem of an increase in fabrication costs of a semiconductor chip and a printed wiring board on which a semiconductor chip is mounted.
In order to solve this problem, Japanese Unexamined Patent Publication No. 5-206227 has suggested a test socket as a test tool for testing a bare chip solely.
FIG. 2 illustrates a test socket 200 suggested in the Publication.
The test socket 200 is comprised of a container 210, a cover 220 for sealing the container 210 therewith, a plurality of output pins 211 extending from an outer bottom of the container 210, connection pads 212 mounted on an inner bottom of the container 210 in alignment with bumps 201 of a bare chip 2 to be tested, and an anisotropically electrically conductive sheet 203 mounted on the connection pads 212.
The test socket 200 is mounted on a substrate under test (not illustrated) by soldering the output pins 211 onto pads mounted on the substrate under test.
The bare chip 2 is inserted into the container 210 such that the bumps 201 face the anisotropically electrically conductive sheet 203. Thereafter, the container 210 is sealed with the cover 220 to thereby compress the bare chip 2 onto the anisotropically electrically conductive sheet 203. Thus, the bumps 201 and the connection pads 212 are electrically connected to each other through the anisotropically electrically conductive sheet 203.
Thus, in accordance with the test socket 200 suggested in the above-mentioned Publication, the bare chip 2 can be tested solely before being mounted on a printed wiring board. Hereinbelow, the test carried out by means of the test socket 200 is called a socket type test.
However, the above-mentioned socket type test is carried out in a condition quite different from a condition in which a semiconductor chip is actually mounted on a printed wiring board. As a result, even if a semiconductor chip were found non-defective in the socket type test, the semiconductor chip might be judged defective in the above-mentioned card test which is carried out after a semiconductor chip has been mounted on a printed wiring board.
Thus, the socket type test is accompanied with a problem of low reliability in results of testing a semiconductor chip.
For instance, in the socket type test, a transmission line through which a test signal is input into or output from the bare chip 2 becomes unavoidably longer by a length of the pin 211. Hence, it would be impossible to test a semiconductor chip operating in a high rate with a radio-frequency signal being transmitted therefrom and received therein, with high reliability in the socket type test.
In addition, it is necessary in the socket type test to make the number and an arrangement pattern of the connection pads 212 coincide with the number and an arrangement pattern of the bumps 201 of the bare chip 2. As a result, the test socket 200 can test merely semiconductor chips having the same number and arrangement pattern. Accordingly, when various kinds of semiconductor chips are to be tested, it would be necessary to prepare test sockets associated with those semiconductor chips, resulting in an increase in fabrication costs of a printed wiring board on which those semiconductor chips are to be mounted.
Furthermore, the test socket 200 is accompanied with a problem that it is not always ensured to cause the bumps 201 and connection pads 212 to make contact with each other through the anisotropically electrically conductive sheet 203 merely by sealing the container 210 with the cover 220.
Specifically, it is generally necessary to apply a force of about 9.8xc3x9710xe2x96xa12 N or greater per a bump to the bare chip 2 in order to ensure contact between the bumps 2 and the connection pads 212. For instance, if the test socket 200 includes 4000 bumps 2, it would be necessary to apply a force of about 392 N to the bare chip 2. It would be quite difficult or almost impossible to uniformly apply such a great force to a semiconductor chip having an area of a few square centimeters, because the container 210 is closed merely by being compressed by the cover 220 which is connected to the container 210 through a hinge.
Japanese Unexamined Patent Publication No. 11-224915 has suggested a substrate on which a semiconductor bare chip is to be mounted, including a plurality of electrodes each of which is broader than a surface of the substrate on which the semiconductor bare chip is to be mounted. The electrodes are electrically connected to electrode pads formed on the semiconductor bare chip, through electrical conductors, when the semiconductor bare chip is mounted on the substrate.
The above-mentioned problems remain unsolved even in the Publication.
In view of the above-mentioned problems in the conventional testers, it is an object of the present invention to provide a semiconductor device tester and a method of testing a semiconductor device both of which is capable of testing a semiconductor device with high reliability and reducing fabrication costs in fabricating a semiconductor device and a printed wiring board on which the semiconductor device is to be mounted.
In one aspect of the present invention, there is provided a semiconductor device tester including (a) a tester substrate having the same structure as a structure of a substrate as a product except that a semiconductor device is not mounted on the tester substrate, (b) an electrically conductive sheet covering therewith a first area in which the semiconductor device is to be mounted on the tester substrate, the electrically conductive sheet being electrically insulating in a certain direction, and (c) a holder supporting a semiconductor device to be tested therewith, and compressing the semiconductor device onto the electrically conductive sheet to thereby electrically connect an externally projecting terminal of the semiconductor device to a connection terminal mounted on the tester substrate in the first area.
In accordance with the present invention, it is possible to test a semiconductor device temporarily mounted on the tester substrate. Namely, a semiconductor device can be tested before being mounted on a printed wiring board. As a result, if a semiconductor device is found defective, only the semiconductor device is scrapped, and it is no longer necessary to scrap a printed wiring board on which the semiconductor device is to be mounted.
Accordingly, the present invention can reduce fabrication costs of a printed wiring board on which a semiconductor device is mounted.
In the present invention, a substrate as a product may be used as the tester substrate. Hence, it is not necessary to prepare a tester jig separately from a substrate as a product, regardless of specific semiconductor chips to be tested. What is necessary for reducing the present invention for practice other than the tester substrate is the electrically conductive sheet having a dimension in conformity with a dimension of a semiconductor chip to be tested.
In contrast, in the above-mentioned conventional socket type test, the tester socket can test only semiconductor chips having the same number and arrangement pattern of external terminals.
Hence, the present invention makes it possible to reduce costs for testing a semiconductor device, and accordingly, costs for fabricating a printed wiring board on which the semiconductor device is mounted, in comparison with the conventional socket type test.
Electronic components except a semiconductor chip to be tested are mounted on the tester substrate similarly to a substrate as a product. Hence, it is possible to test a semiconductor chip by inputting a test signal thereinto or receiving a test signal therefrom through the tester substrate, regardless of the number of electronic components and a pattern in which electronic components are arranged.
In contrast, in the conventional pin type test, a test signal is input into or output from the bare chip 2 through the electrode pins 104 and the electrode pads 103, as illustrated in FIG. 1. Accordingly, if the number of electronic components mounted on a printed wiring board were increased, the electrode pins 104 had to be increased in number accordingly, even if the bare chip 2 remains the same. This results in an increase in costs for carrying out the test.
In comparison with the pin type test, the present invention makes it possible to reduce testing costs, and accordingly, fabrication costs of a printed wiring board.
In accordance with the present invention, a semiconductor device is temporarily mounted on the tester substrate on which electronic components except a semiconductor chip are mounted, and then, tested. Hence, a semiconductor device can be tested in the same condition as a condition in which a semiconductor device is actually mounted on a printed wiring board as a product. Accordingly, a semiconductor device can be tested with high reliability.
In the present invention, since what is inserted between a semiconductor device to be tested and the tester substrate is the electrically conductive sheet only, it would be possible to shorten a length of a transmission line through which a test signal is transmitted between a semiconductor chip and the tester substrate, in comparison with the same in the above-mentioned socket type test. Accordingly, the present invention makes it possible to test a semiconductor chip transmitting and receiving radio-frequency signals for high-rate operation, with high reliability.
In addition, in accordance with the present invention, a semiconductor device can be tested before being mounted on a printed wiring board. Hence, in fabrication of a printed wiring board, it is possible to carry out in parallel a step of testing a semiconductor device and a step of mounting electronic components on a printed wiring board, ensuring an increase in an efficiency of fabricating a printed wiring board.
It may be considered that a semiconductor device is temporarily mounted on the tester substrate without the electrically conductive sheet being sandwiched therebetween. However, a semiconductor chip or a package of BGA has a curvature, and there is non-uniformity in a height of externally projecting terminals of a semiconductor chip. Similarly, the tester substrate has a curvature, and there is non-uniformity in a height of connection terminals of the tester substrate.
Hence, it would be quite difficult to cause all of externally projecting terminals of a semiconductor chip to surely make direct contact with connection terminals of the tester substrate at the same time.
Even if all of the externally projecting terminals of a semiconductor chip could be caused to make contact with the connection terminals of the tester substrate by compressing the semiconductor chip onto the tester substrate under a high pressure, in order to absorb the above-mentioned curvature and non-uniformity, there is high possibility that both the externally projecting terminals and the connection terminals might be damaged. In particular, the connection terminals of the tester substrate are likely to be deformed or broken.
If the connection terminals were damaged, the tester substrate has to be replaced with a new one. If the externally projecting terminals of a semiconductor chip were damaged, the semiconductor chip might be unable to be properly recognized when mounted on a printed wiring board.
For instance, the electrically conductive sheet may be comprised of an insulating resin film, and electrical conductors in the form of a line. The electrical conductors extend through the insulating resin film in a thickness-wise direction of the insulating resin film at a first pitch equal to or smaller than a second pitch at which externally projecting terminals of the semiconductor device are arranged.
In accordance with the above-mentioned electrically conductive sheet, the insulating resin film having flexibility absorbs non-uniformity in a height of the externally projecting terminals and the connection terminals, and the electrical conductors ensure electrical connection between the externally projecting terminals and the connection terminals. Thus, it would be possible to surely electrically connect all of the externally projecting terminals to all of the connection terminals at a time.
In addition, the electrically conductive sheet can be cut into a desired shape in conformity with a shape and/or a dimension of a semiconductor device to be tested or the first area. Hence, the electrically conductive sheet having a desired dimension can be readily prepared regardless of a shape and/or a dimension of a semiconductor device.
It is preferable that the electrical conductors are inclined relative to a normal line of the electrically conductive sheet.
It is preferable that the electrical conductors are inclined relative to a normal line of the electrically conductive sheet by an angle in the range of 10 to 45 degrees both inclusive.
It is preferable that the electrical conductors are S-shaped.
It is preferable that the electrical conductors extend through the insulating resin film vertically to a surface of the electrically conductive sheet.
It is preferable that the electrical conductors are bent such that an end of each of the electrical conductors is in alignment with the other end of each of the electrical conductors at opposite surfaces of the electrically conductive sheet.
It is preferable that the electrical conductors are composed of elastic material.
As an alternative, the electrically conductive sheet may be comprised of an insulating film formed with through-holes in the same pattern as a pattern in which externally projecting terminals of the semiconductor device are arranged, and electrical conductors filling the through-holes therewith such that the electrical conductors project at opposite sides of the insulating film.
The above-mentioned electrically conductive sheet makes it possible to arrange the electrical conductors in the same pattern as a pattern in which the externally projecting terminals are arranged. Since the electrical conductors make contact with the externally projecting terminals, the externally projecting terminals would be less damaged than the externally projecting terminals making contact with the above-mentioned electrical conductors in the form of a line.
In addition, the electrically conductive sheet shortens a distance between a semiconductor device under test and the tester substrate. Hence, the electrically conductive sheet is in particular suitable for testing a semiconductor chip having a high operation speed.
The electrical conductors may be composed preferably of elastic material such as electrically conductive resin, ensuring electrical connection between a semiconductor chip under test and the tester substrate.
A plurality of externally projecting terminals is mounted on a face of a semiconductor chip to be mounted on a printed wiring board by face-down bonding. Hence, in order to ensure the externally projecting terminals to make contact with the connection terminals, it would be necessary to compress a semiconductor chip onto the electrically conductive sheet with a great force to some degree.
On the other hand, it is also necessary to minimize damage to be exerted on externally projecting terminals of a semiconductor chip or a package of BGA, in order not to exert a harmfully influence on a next step, that is, a step of mounting a semiconductor chip on a substrate.
A side surface of a bare chip or BGA is not perfectly perpendicular to a face, and generally has irregularities. In addition, a bare chip or BGA is quite thin. Accordingly, it would be quite difficult to mechanically hold a bare chip at its side surfaces, and then, compress the bare chip onto the tester substrate with a sufficiently great force.
Thus, the holder may be designed to include an adsorption surface at which a surface opposite to a surface on which the externally projecting terminal is mounted is adsorbed, at least one hole formed in the adsorption surface, the semiconductor device being adsorbed to the holder at the adsorption surface by sucking the semiconductor device through the hole.
By holding a semiconductor chip by means of the holder, it is possible to surely hold a semiconductor chip with a minimum stress being applied thereto, and compress the semiconductor chip onto the electrically conductive sheet with a force as great as possible.
When the electrically conductive sheet is deformed by being compressed by a semiconductor device, a portion of the electrically conductive sheet located around a compressed portion displaces towards a non-compressed portion. As a result, the electrical conductor located in the portion makes slide movement, resulting in insufficient contact between the electrically conductive sheet and an outermost externally projecting terminal among the externally projecting terminals.
To avoid this problem, the holder may be designed to include a wall standing around the adsorption surface, the wall having a height equal to a sum of a thickness of the semiconductor device and a thickness of the externally projecting terminal.
When a semiconductor device is compressed onto the electrically conductive sheet, a portion around a portion making contact with the externally projecting terminals of a semiconductor device is also compressed by the wall. Hence, it is possible to prevent the electrical conductor from making slide movement around an outermost externally projecting terminal among the externally projecting terminals, ensuring electrical connection between the outermost externally projecting terminal and the associated connection terminal.
The semiconductor device tester may be designed to further include (d) a detector which detects alignment marks of both the tester substrate and the semiconductor device and transmits a detection signal indicative of results of the detection, and (e) a mover which moves the holder relative to the tester substrate in accordance with the detection signal.
It is preferable that the tester substrate includes a frame formed thereon for inserting the electrically conductive sheet thereinto.
It is preferable that the frame is formed with a recess in a horizontal plane, the electrically conductive sheet being inserted at an outer edge thereof into the recess.
In another aspect of the present invention, there is provided a method of testing a semiconductor device, comprising the steps of (a) positioning an electrically conductive sheet above a first area in which a semiconductor device to be tested is to be mounted on a tester substrate having the same structure as a structure of a substrate as a product except that a semiconductor device is not mounted on the tester substrate, the electrically conductive sheet being electrically insulating in a certain direction, (b) compressing the semiconductor device onto the electrically conductive sheet to thereby electrically connect an externally projecting terminal of the semiconductor device to a connection terminal mounted on the tester substrate in the first area, (c) inputting a test signal into the semiconductor device through the tester substrate and receiving the test signal from the semiconductor device through the tester substrate, and (d) judging whether the semiconductor device is non-defective or defective in accordance with results of the step (c).
For instance, the step (b) may include the steps of (b1) sucking the semiconductor device at a surface opposite to a surface on which the externally projecting terminal is mounted, onto an adsorption surface of a holder, and (b2) moving the holder towards the electrically conductive sheet.
It is preferable that the holder includes a wall standing around the adsorption surface, the wall having a height equal to a sum of a thickness of the semiconductor device and a thickness of the externally projecting terminal, the wall also compressing the semiconductor device onto the electrically conductive sheet in the step (b).
The method may further include the steps of (e) detecting alignment marks of both the tester substrate and the semiconductor device, and (f) correcting a position of the semiconductor chip in accordance with results of the detection carried out in the step (a).
The method may further include the steps of (e) detecting alignment marks of both the tester substrate and the semiconductor device, and (f) correcting a position of the holder in accordance with results of the detection carried out in the step (a).